CompactPCI® Single Board Computer CP 16
Description
The CP16 uses the Intel® Pentium® M processor to provide maximum processing and thermal performance. Key features designed into the CP16 include a front access PMC slot, local storage options, dual Gigabit Ethernet ports and support for up to 2GB of DDR220/266 memory. A rear transition module, RTM25, is available with or without dual Ultra320 SCSI interfaces and provides rear access to the SBC's I/O ports and status LEDs. PICMG® compliance and features like a local storage option and the ability to turn off the CompactPCI® bus enable the CP16 to excel in a wide variety of either CompactPCI system board or server blade computing applications.
Model number and model name definitions:
6137 CP16 = Intel Pentium M processor, standard-memory configuration
PROCESSOR & PACKAGE STYLEIntel® Pentium® M processor 760 (2.0GHz) Intel® Pentium® M processor 745 (1.8GHz) Intel® Pentium® M processor 1.6GHz Processor Package = mPGA478M socket  |
CACHE MEMORY (L2)Intel® Pentium® M processor 760 & Intel® Pentium® M processor 745 - 2MB Intel® Pentium® M processor 1.6GHz - 1MB |
CHIPSETThe Intel® E7501 Chipset with the Intel® ICH3 I/O Controller Hub |
SYSTEM BUS & MEMORYSystem Bus = 533/400MHz Memory Interface Structure = Single-channel interface with one DDR2 DIMM socket Class = DDR2-266 Max. = 2GB Min. = 128MB DIMM Type = PC-2100, PC-1600, 72-bit with ECC, registered DIMM Construction = x4/x8, non-stacked, Gold card-edge fingers |
EDGE CARD INTERFACESCompactPCI Slot Support: 7, 32-bit/33MHz direct slots and 4 64-bit/33MHz expansion slots PCI Bus mastering support: Yes Blade Operation Support: Yes, via CompactPCI bus switches to turn off bus CompactPCI® Bus Speed: 32-bit/33MHz, 32-bit/66MHz, 64-bit/33MHz or 64-bit/66MHz Hub Link 2.0 (1GB/s): Routed to J4 for Ultra320 SCSI support on the optional RTM25 10/100/1000Base-T Ethernet: 2, LANs routed to J3 for Packet Switching Backplane (PICMG 2.16) functionality UXGA Video: Routed to J4 for support on RTM25 IPMI: Sensor and IPMB routed to J4 and J1 for IPMI and Hot Swap functionality (PICMG 2.9 and 2.12) |
VIDEO INTERFACEVideo Controller: ATI® M6-C16H video controller Memory: 16MB Resolution: Up to 1600 x 1200 (UXGA) |
BATTERYType: Lithium Purpose: CMOS data retention |
I/O INTERFACES
|
BIOS (FLASH)The CP16's BIOS is AMIBIOS8® with IPMI extensions. The flash BIOS resides in the 82802 Firmware Hub (FWH). Some of the key features of the BIOS are:
|
ETHERNET INTERFACESI/O Bracket = 2, 10/100/1000Base-T via Intel® 82546EB Dual Port Ethernet Controller driven by a 64-bit/100MHz PCI-X bus I/O Bracket Connectors = RJ-45 Packet Switching Backplane = 2, 10/100/1000Base-T from an Intel® 82546EB Dual Port Ethernet Controller with the LANs routed to J3 Edge Connector |
STANDARDS- PCI Local Bus Specification 2.1 PCI-SIG, PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0b - CompactPCI® Core Specification, PICMG® 2.0, R3.0 - CompactPCI® Hot Swap Specification, PICMG® 2.1, R2.0 - CompactPCI® Hot Swap Infrastructure Specification, PICMG® 2.12, R2.0 - CompactPCI® System Management Specification, PICMG® 2.9, R1.0 (Intelligent Platform Management Interface (IPMI) support) - CompactPCI® PCI Telecom Mezzanine Card (PTMC) Specification, PICMG® 2.15, R1.0 - CompactPCI® Packet Switching Backplane Specification, PICMG® 2.16, R1.0 |
WATCHDOG TIMER
|
MECHANICAL
|
AGENCY APPROVALS & COMPLIANCE
|
MEAN TIME BETWEEN FAILURES (MTBF)
|
POWER REQUIREMENTS - 100% stressed
Typical Values
-12V @ <100mA *5V(I/O) configured backplane **3.3V(I/O) configured backplane The system power supply must conform to the power sequencing specifications of ATX compliant power supplies. Voltage levels must be regulated within a range of +/- 5%. |
POWER REQUIREMENTS - Idle
|
||||||||||||||||||||||||||||
TEMPERATURE & ENVIRONMENTALS
|
OTHER ENVIRONMENTAL REQUIREMENTS
|
||||||||||||||||||||||||||||
MEMORY SLOT POPULATION
|
|||||||||||||||||||||||||||||
IOBxx EXPANSION BOARDS (OPTIONAL)
|
|||||||||||||||||||||||||||||